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hz description the hcpl- 800j is a galvanically isolated powerline data access arrangement ic. it provides the key features of isolation, tx line driver and rx amplifier as required in a powerline modem application. used together with a simple lc coupling circuit, the hcpl- 800j offers a highly integrated, cost effective analogue front end (afe) solution. optical coupling technology provides very high isolation mode rejection, facilitating excellent emi and emc performance. application robustness is enhanced by the agilent HCPL-800J plc powerline daa ic data sheet connection diagram filter filter v cc1 n gnd2 powerline transceiver ic (endec) tx-en tx rx status gnd2 gnd2 gnd2 gnd1 l v cc2 HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 inherent properties of opto- isolation devices, to effectively block the transfer of damaging surge transients. excellent transmitter performance is achieved with the use of a high efficiency, low distortion line driver stage. transmitter robustness is further enhanced with integrated load detection and over- temperature protection functions. the hcpl- 800j is designed to work with various transceiver ics and significantly simplify the implementation of a powerline modem. features ? -60 db overall tx distortion 25 nv/ typical input referred noise load detection function under-voltage detection over-temperature shutdown highly efficient tx line driver built-in rx amplifier temperature range: -40 c to +85 c regulatory approv als (pending): ul, csa, iec/en/din en 60747-5-2 suitable for fcc part 15 and en50065-1 compliant design applications automatic meter reading (amr) powerline modem home automation/control security and surveillance general purpose isolated transceiver internet appliances caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
2 block diagram package pin out pin descriptions pin no. symbol description 1 tx-en transmit enable input 2 tx-in transmit input signal 3 rx-pd-out rx photodetector output 4 rx-amp-in receiver output amplifier input 5 status signal indicating line condition 6 rx-out receiving signal output 7v cc1 5 v power supply 8gnd1v cc1 power supply ground 9r ref sets line driver biasing current, typically 24 k ? 10 rx-in receiving signal input from powerline 11 c ext external capacitor 12 tx-ld-in tx line driver input 13 tx-pd-out tx photodetector output 14 v cc2 5 v power supply 15 tx-out transmit signal output to powerline 16 gnd2 v cc2 power supply ground tx led driver tx tia g t2 tx -en detection line driver control v cc2 uvd load detection over -temp detection rx led driver rx tia status detection g r2 control ic line ic rx -amp -in rx -out tx -in v cc1 tx -en gnd1 rx -pd -out status tx -pd -out tx -ld -in tx -out rx -in r ref v cc2 gnd2 c ext 1 2 7 8 5 6 43 10 9 11 16 14 15 12 13 status logic agc shield shield amp tx led driver tx tia g t2 tx -en detection line driver control v cc2 uvd load detection over -temp detection rx led driver rx tia status detection g r2 control ic line ic rx -amp -in rx -out tx -in v cc1 tx -en gnd1 rx -pd -out status tx -pd -out tx -ld -in tx -out rx -in r ref v cc2 gnd2 c ext 1 2 7 8 5 6 43 10 9 11 16 14 15 12 13 status logic agc shield shield amp 1 tx -in tx -en v cc1 status rx -out rx -in rx -pd -out rx -amp -in gnd1 gnd2 c ext tx -out r ref tx -pd -out tx -ld -in v cc2 2 3 4 5 6 7 8 16 9 15 14 13 12 11 10
3 ordering information specify part number followed by option numbe r (if desired). example: HCPL-800J-xxx no option = 16-lead, surface mt. package, 45 per tube. 500 = tape and reel packaging option, 850 per reel. option data sheets available. contact agilent technologies sale s representative, authorized dis tributor, or visit our web site at www.agilent.com/view/optocouplers. package outline drawings 16-lead surface mount land pattern recommendation dimensions in inches (millimeters). dimensions in inches (millimeters). notes: 1. initial and continued variation in the color of the HCPL-800J?s white mold compound is normal and does not affect device performance or reliability. 2. floating lead protrusion is 0.006 (0.15) max. 9 0.295 0.010 (7.493 0.254) 10 11 12 13 14 15 16 8 7 6 5 4 3 2 1 0.018 (0.457) 0.138 0.005 (3.505 0.127) 9 0.406 0.10 (10.312 0.254) 0.408 0.010 (10.160 0.254) 0.025 min. 0.008 0.003 (0.203 0.076) standoff 0.345 0.010 (8.986 0.254) 0?8 0.018 (0.457) 0.050 (1.270) all leads to be coplanar 0.002 a 800j yyww type number date code 0.458 (11.63) 0.085 (2.16) 0.025 (0.64) 0.458 (11.63) 0.085 (2.16) 0.025 (0.64)
4 package characteristics all specifications and figures are at the no minal (typical) operating conditions of v cc1 = 5 v, gnd1 = 0 v, v cc2 = 5 v, gnd2 = 0 v and t a = +25 c. notes: 1. in accordance with ul1577, each optocoupler is pr oof tested by applying an insulation test voltage 4500 vrms for 1 second (leakage detection current limit, i i-o 5 a). this test is performed before the 100% production test for partial discharge (met hod b) shown in iec/en/din en 60747-5-2 in sulation characteristics table, if applicable. 2. the control ic-line ic momentary withstand voltage is a dielectric volt age rating that should not be interpreted as a control ic-line ic continuous voltage rating. for the continuous voltage rating refer to your equipment level safety specificat ion or iec/en/din en 60747-5-2 insulation characteristics table. 3. device is considered as a two terminal device: pins 1 - 8 shorted together and pins 9 - 16 shorted together. 4. maximum power dissipation in control side and line side ic's ne eds to be limited to ensure that their respective junction tem perature is less than 125 c. the maximum permissible power dissipation is dependent on the th ermal impedance and the ambient te mperature. details on the typ ical thermal impedances are given in the package characteristics. further details on applying this to an actu al application can be found in the application information section under thermal considerations. solder reflow temperature profile parameter symbol min. typ. max. units test conditions note control ic - line ic momentary withstand voltage v iso 3750 v rms rh< 50%, t = 1 min., t a = 25 c1, 2, 3 resistance (control ic - line ic) r i-o >10 9 ? v i-o = 500 v dc 3 capacitance (control ic - line ic) c i-o 1.4 pf f = 1 mhz control ic to ambient thermal resistance ia 83 c/w 1 oz. trace, 2-layer pcb still air, t a = 25 c 4 line ic to ambient thermal resistance oa 85 0 time (seconds) temperature (c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160c 140c 150c peak temp. 245c peak temp. 240c peak temp. 230c soldering time 200c preheating time 150c, 90 + 30 sec. 2.5c 0.5c/sec. 3c + 1c/?0.5c tight typical loose room temperature preheating rate 3c + 1c/?0.5c/sec. reflow heating rate 2.5c 0.5c/sec.
5 regulatory information the HCPL-800J is pending for approv al by the following organizations: iec/en/din en 60747- 5- 2 approved under: iec 60747-5-2:1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01 with v iorm = 891 vpeak. ul recognized under ul 1577, component recognition program, file e55361. csa approved under csa acceptance notice #5, file ca 88324. iec/en/din en 60747-5-2 insulation characteristics (1) description symbol characteristic unit installation classification per din vde 0110/1.89, table 1 for rated mains voltage 150 vrms for rated mains voltage 300 vrms for rated mains voltage 600 vrms i ? iv i ? iii i ? ii climatic classification 55/100/21 pollution degree (din vde 0110/1.89) 2 maximum working insulation voltage v iorm 891 v peak input to output test voltage, method b (2) v iorm x 1.875 = v pr , 100% production test with t m = 1 sec, partial discharge < 5 pc v pr 1670 v peak input to output test voltage, method a (2) v iorm x 1.5 = v pr , type and sample test, t m = 60 sec, partial discharge < 5 pc v pr 1336 v peak highest allowable over-voltage (2) (transient over-voltage t ini = 10 sec) v iotm 6000 v peak safety-limiting values - maximum values allowed in the event of a failure case temperature control side power (3) line side power (3) t s p s, input p s, output 175 400 1500 c mw mw insulation resistance at t s , v io = 500 v r s >10 9 ? notes: 1. isolation characteristics are gu aranteed only within the safety maximum ratings that must be ensured by protective circuits in application. surface mount classification is class a in accordance with ceccoo802. 2. refer to the optocoupler section of the isolat ion and control component designer?s catalog, under product safety regulations section, (iec/en/din en 60747-5-2) for a detailed description of method a and method b partial discharge test profiles. 3. refer to the following figure for dependence of p s, input and p s, output on case temperature. 0 25 50 75 100 125 150 175 200 1600 1400 1200 1000 800 600 400 200 0 t s ? case temperature ? c p s ?power ?mw p s, output p s, input 0 25 50 75 100 125 150 175 200 1600 1400 1200 1000 800 600 400 200 0 t s ? case temperature ? c p s ?power ?mw p s, output p s, input
6 insulation and safety related specifications absolute maximum ratings notes: 1. maximum power dissipation in control side and line side ic's ne eds to be limited to ensure that their respective junction tem perature is less than 125 c. the maximum permissible power dissipation is dependent on the th ermal impedance and the ambient te mperature. details on the typ ical thermal impedances are given in the package characteristics. further details on applying this to an actu al application can be found in the application information section under thermal considerations. recommended operating conditions notes: 1. the transmitter input impedance is very low, this is meant fo r signal current input. transmitter performance is optimized at 250 a pp input signal, an external series resistor with nominal value of 2 k ? would be required if the input signal is 0.5 v pp . parameter symbol value unit condition minimum external air gap (clearance) l(101) 8.3 mm measured from input terminals to output terminals, shortest distance through air. minimum external tracking (creepage) l(102) 8.3 mm measured from input terminals to output terminals, shortest dist ance path along body. minimum internal plastic gap (internal clearance) 0.5 mm through insulation dist ance of conductor to conductor, usually the straight-line distance between the emitter and detector. tracking resistance (comparative tracking index) cti >175 volts din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1) parameter symbol minimum maximum unit note storage temperature t s ? 55 125 c ambient operating temperature t a ? 40 85 c junction temperature t j 125 c supply voltage 1 v cc1 ? 0.5 5.5 v supply voltage 2 v cc2 ? 0.5 5.5 v transmit output voltage v tx- o u t ? 0.5 v cc2 v transmit input signal voltage v tx- i n ? 0.5 v cc1 v transmit enable voltage v tx- e n ? 0.5 v cc1 v receiving input signal voltage v rx-in ? 0.5 v cc2 v control-side power dissipation p i 200 mw 1 line-side power dissipation p o 1000 mw solder reflow temperature profile (see solder reflow te mperature profile section) parameter symbol minimum ty pical maximum unit note ambient operating temperature t a ? 40 85 c input supply voltage v cc1 4.75 5 5.25 v output supply voltage v cc2 4.75 5 5.25 v tx-in signal current i tx- i n 250 a pp 1
7 electrical specifications unless otherwise noted, for sinusoidal wave form input and reference resistor r ref = 24 k ? , all typical values are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v; all minimum/maximum specifications are at recommended operating conditions. general notes: 1. threshold of falling v cc2 with hysteresis of 0.15 v (typ.). 2. threshold of rising junction temperature with hysteresis of 15 c (typ.). 3. imrr is defined as the ratio of the signal gain (measured at rx-pd-out with signal applied to rx-in) to the isolation mode ga in (measured at rx-pd-out with rx-in connected to gnd2 and the isolation mode voltage, v im , applied between gnd1 and gnd2), expressed in db. parameter symbol min. ty p . max. unit test con dit ion fig. note v cc1 supply current i cc1 6 15 ma v tx- e n = 0 v 1 20 28 ma v tx- e n = 5 v v cc2 supply current i cc2 22 28 ma v tx- e n = 0 v 2 40 56 ma v tx- e n = 5 v 2, 3, 4 status logic high output v oh v cc1 ? 1 v i oh = ? 4 ma status logic low output v ol 1 v v cc2 = 3.5 v, i ol = 4 ma v cc2 under voltage detection v uvd 3.8 4 4.3 v 1 junction over-temperature threshold t th 130 c 2 load detection threshold 0.6 a pp v tx- e n = 5 v, f = 132 khz 5, 19 isolation mode rejection ratio imrr 80 db v tx- e n = 0 v, f = 132 khz 6, 20 3
8 electrical specifications (cont.) unless otherwise noted, for sinusoidal wave form input and reference resistor r ref = 24 k ? , all typical values are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v; all minimum/maximum specifications are at recommended operating conditions. transmitter notes: 1. time from transmit is enabled (v tx- e n is set to logic high) until output (tx-pd-out) is availa ble. see figure 26 in the application information section. 2. time from output (tx-pd-out) is availabl e until tx-pd-out signal reaches 66% of its steady state level. see figure 26 in the application information section. 3. to keep the junction temperature as clos e to the ambient temperature as possible, pu lse testing method is used. the device is transmit-enabled within the pulse duration time, t p . thermal effects must be considered separately. 4. maximum power dissipation in control side and line side ic's ne eds to be limited to ensure that their respective junction tem perature is less than 125 c. the maximum permissible power dissipation is dependent on the th ermal impedance and the ambient te mperature. details on the typ ical thermal impedances are given in the package characteristics. further details on applying this to an actu al application can be found in the application information section under thermal considerations. parameter symbol min. typ. max. unit test condition fig. note transmit enable threshold voltage v th, tx-en 0.8 2.4 v set-up time (tx-pd-out) t s, tx 10 sv tx- e n = 5 v, i tx- i n = 250 a pp , f = 132 khz, tx-pd-out no load 21 1 agc settling time t agc 180 s2 tx photodetector output voltage (tx-pd-out) 2.8 3.3 3.6 v v tx- e n = 5 v, i tx- i n = 250 a pp , f = 132 khz, t a = 25 c 7, 8, 9 2nd harmonic distortion tx - p d - o u t ) hd2 tx p d ? 50 db v tx- e n = 5 v, i tx- i n = 250 a pp , f = 132 khz, tx-pd-out load 1 k ? 10, 22 3rd harmonic distortion (tx-pd-out) hd3 tx p d ? 62 db bandwidth (tx-pd-out) bw tx p d 1mhzv tx- e n = 5 v, i tx- i n = 250 a pp tx photodetector output impedance (tx-pd-out) z o, txpd 1 ? v tx- e n = 5 v, f = 132 khz line driver (ld) power supply (v cc2 ) rejection ratio psrr 55 db 50 hz ripple, v ripple = 200 mv pp input impedance z i, ld 10 k ? v tx- e n = 5 v, f = 132 khz dc biased voltage v bias, ld 2.27 v v tx- e n = 5 v gain g t2 1.8 2 2.2 v/v v tx- e n = 5 v, f = 132 khz, tx - o u t n o l o a d 11 2nd harmonic distortion (tx-out) hd2 ld ? 65 ? 60 db v tx- e n = 5 v, v tx- o u t = 3.6 v pp , f = 132 khz, tx-out load 50 ? , t a = 25 c 12, 13, 14, 15, 16, 23 3rd harmonic distortion (tx-out) hd3 ld ? 75 ? 65 db output impedance (tx-out) z o, ld 0.5 ? v tx- e n = 5 v, f = 132 khz 7.5 k ? v tx- e n = 0 v, f = 132 khz short-circuit output current i os 2a pp v tx- e n = 5 v, v tx- l d - i n = 1.8 v pp , f = 132 khz, t p 50 s 3, 4
9 hz electrical specifications (cont.) unless otherwise noted, for sinusoidal wave form input and reference resistor r ref = 24 k ? , all typical values are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v; all minimum/maximum specifications are at recommended operating conditions. receiver parameter symbol min. typ. max . unit test condition fig. note input impedance z i, rx 4 k ? v tx- e n = 0 v, f = 132 khz output impedance (rx-pd-out) z o, rxpd 30 ? v tx- e n = 0 v, f = 132 khz input referred noise v nr 25 nv/ v tx- e n = 0 v, v rx-in = 0 v pp bandwidth (rx-pd-out) bw rxpd 500 khz v tx- e n = 0 v gain g r1 20 db v tx- e n = 0 v, v rx-in = 0.05 v pp , f = 132 khz 17 set-up time (rx-pd-out) t s, rx 10 sv tx- e n = 0 v, f = 132 khz total harmonic distortion (rx-pd-out) thd rxpd ? 38 db v tx- e n = 0 v, v rx-in = 0.01 v pp , f = 132 khz receiver output amplifier (rxamp) dc biased voltage v bias, rx 2.27 v output impedance z o, rxa 20 ? v tx- e n = 0 v, f = 132 khz total harmonic distortion (rx-out) thd rx ? 60 db v tx- e n = 0 v, f = 132 khz, v rx-amp-in = 0.5 v pp , gain = ? 4, feedback resistor 20 k ? gain bandwidth product gbw rxa 28 mhz v tx- e n = 0 v, f = 132 khz, v rx-in = 0.1 v pp , g r2 = ? 20, feedback resistor 20 k ? 18
10 typical performance plots unless otherwise noted, all typical plots are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v, sinusoidal waveform input, signal frequency f = 132 khz, i tx- i n = 250 a pp , and r ref = 24 k ? . figure 1. v cc1 supply current vs. temperature. figure 2. v cc2 supply current vs. temperature. figure 3. v cc2 supply current vs. reference resistor. figure 4. v cc2 supply current vs. tx output current. figure 5. normalized load detection threshold vs. tempera ture. figure 6. isolation mode rejection ratio vs. frequency. 0 5 10 15 20 25 -50-25 0 255075100 t a ? ambient temperature ? c i cc1 ? supply current ? ma rx tx 0 5 10 15 20 25 -50-25 0 255075100 t a ? ambient temperature ? c i cc1 ? supply current ? ma rx tx rx tx 0 5 10 15 20 25 30 35 40 45 -50 -25 0 25 50 75 100 rx tx t a ? ambient temperature ? c i cc2 ? supply current ? ma 0 5 10 15 20 25 30 35 40 45 -50 -25 0 25 50 75 100 rx tx rx tx t a ? ambient temperature ? c i cc2 ? supply current ? ma 0 10 20 30 40 50 60 70 80 90 100 5 10152025 r ref ? reference resistor ? k ? i cc2 ? supply current ? ma v tx-en = 5 v 0 10 20 30 40 50 60 70 80 90 100 5 10152025 r ref ? reference resistor ? k ? i cc2 ? supply current ? ma v tx-en = 5 v 0 50 100 150 200 250 300 0 0.2 0.4 0.6 0.8 1 1.2 1.4 i tx-out ? tx-out output current ? a pp i cc2 ? supply current ? ma 0 50 100 150 200 250 300 0 0.2 0.4 0.6 0.8 1 1.2 1.4 i tx-out ? tx-out output current ? a pp i cc2 ? supply current ? ma 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c normalized at 25c 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c normalized at 25c 50 55 60 70 80 85 90 0 0.5 1 1.5 2 f ? frequency ? mhz isolation mode rejection ratio ? db 75 65 50 55 60 70 80 85 90 0 0.5 1 1.5 2 f ? frequency ? mhz isolation mode rejection ratio ? db 75 65
11 typical performance plots (cont.) unless otherwise noted, all typical plots are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v, sinusoidal waveform input, signal frequency f = 132 khz, i tx- i n = 250 a pp , and r ref = 24 k ? . figure 7. normalized tx-pd-out output voltage vs. temperature. figure 8. tx-pd-out output voltage vs. tx-in input current. figure 9. normalized tx-pd-out output voltage vs. frequenc y. figure 10. tx-pd-out harmonic distortion vs. temperature. figure 11. normalized line driver gain vs. temperature. fi gure 12. line driver harmonic distortion vs. temperature. 0.4 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c normalized at 25c 0.4 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c normalized at 25c i tx-in ? tx input current ? a pp v tx-pd-out ? tx-pd-out output voltage ? v 0 50 100 150 200 250 0 1 2 3 4 i tx-in ? tx input current ? a pp v tx-pd-out ? tx-pd-out output voltage ? v 0 50 100 150 200 250 0 1 2 3 4 10 k 100 k 1 m 10 m f ? frequency ? hz 0 0.2 0.4 0.6 0.8 1 1.2 normalized at 132 khz i tx-in = 65 a pp 10 k 100 k 1 m 10 m f ? frequency ? hz 0 0.2 0.4 0.6 0.8 1 1.2 normalized at 132 khz i tx-in = 65 a pp hd2 hd3 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c -80 -75 -70 -65 -60 -55 -50 -45 -40 -35 -30 hd ? harmonic distortion ? dbc hd2 hd3 hd2 hd3 -50 -25 0 25 50 75 100 t a ? ambient temperature ? c -80 -75 -70 -65 -60 -55 -50 -45 -40 -35 -30 hd ? harmonic distortion ? dbc 0.99 0.995 1 1.005 1.01 normalized at 25c -50 -25 0 25 50 75 100 t a ? ambient temperature ? c 0.99 0.995 1 1.005 1.01 normalized at 25c -50 -25 0 25 50 75 100 t a ? ambient temperature ? c -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 v tx-out = 3.6 v pp -50 -25 0 25 50 75 100 t a ? ambient temperature ? c hd2 hd3 -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 v tx-out = 3.6 v pp -50 -25 0 25 50 75 100 t a ? ambient temperature ? c hd2 hd3 hd2 hd3
12 typical performance plots (cont.) unless otherwise noted, all typical plots are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v, sinusoidal waveform input, signal frequency f = 132 khz, i tx- i n = 250 a pp , and r ref = 24 k ? . figure 13. line driver harmonic distortion vs. frequency for r ref = 24 k ? . figure 14. line driver harmonic distortion vs. frequency for rref = 8 k ? . figure 15. line driver harmonic distortion vs. tx-out output voltage. figure 16. line driver peak harmonic distortion vs. load. figure 17. normalized rx-pd-out output voltage vs. frequency. figure 18. rxamp gain and phase vs. frequency. 0 100 500 f ? frequency ? hz 200 300 400 -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 hd2 hd3 r ref = 24 k ? 0 100 500 f ? frequency ? hz 200 300 400 -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 hd2 hd3 hd2 hd3 r ref = 24 k ? 0 100 500 f ? frequency ? hz 200 300 400 -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 hd2 hd3 r ref = 8 k ? 0 100 500 f ? frequency ? hz 200 300 400 -80 -75 -70 -65 -60 -55 -50 -45 -40 hd ? harmonic distortion ? dbc -85 -90 hd2 hd3 hd2 hd3 r ref = 8 k ? -90 -85 -80 -75 -70 -65 -60 -55 -50 -45 -40 012345 v tx-out ? tx-out output voltage ? v pp hd ? harmonic distortion ? dbc hd2 hd3 -90 -85 -80 -75 -70 -65 -60 -55 -50 -45 -40 012345 v tx-out ? tx-out output voltage ? v pp hd ? harmonic distortion ? dbc hd2 hd3 hd2 hd3 40 50 60 70 80 0 1020304050 r l ? resistive load ? ? ld peak harmonic distortion ? dbv 75 65 55 45 hd2 hd3 v tx-ld-in = 1.8 v pp z coupling = 3.5 ? + 150 nf + 10 h 40 50 60 70 80 0 1020304050 r l ? resistive load ? ? ld peak harmonic distortion ? dbv 75 65 55 45 hd2 hd3 hd2 hd3 v tx-ld-in = 1.8 v pp z coupling = 3.5 ? + 150 nf + 10 h 0 0.2 0.4 0.6 0.8 1 1.2 10 k 100 k 1 m 10 m normalized at 132 khz f ? frequency ? hz v rx-in = 50 mv pp 0 0.2 0.4 0.6 0.8 1 1.2 10 k 100 k 1 m 10 m normalized at 132 khz f ? frequency ? hz v rx-in = 50 mv pp 0 10 20 30 40 50 60 70 80 90 120 10 100 1 k 10 k 10 m a ol ?rxamp voltage gain ?db f ? frequency ? hz 100 k 1 m 100 110 0 20 40 60 80 100 120 140 160 180 240 phase ? degrees 200 220 gain phase 0 10 20 30 40 50 60 70 80 90 120 10 100 1 k 10 k 10 m a ol ?rxamp voltage gain ?db f ? frequency ? hz 100 k 1 m 100 110 0 20 40 60 80 100 120 140 160 180 240 phase ? degrees 200 220 gain phase gain phase
13 te s t c i r c u i t d i a g r a m s unless otherwise noted, all test circuits are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v, sinusoidal waveform input, and signal frequency f = 132 khz. figure 19. load detection test circuit. figure 20. isolation mode re jection ratio test circuit. figure 21. tx-pd-out enable/disable time test circuit. 100 nf gnd2 100 nf scope 100 f v cc2 1 f v cc1 1 f gnd2 gnd1 100 nf HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 v in = 1.5 v pp 24 k ? r ref 2.5 ? r l gnd2 v cc1 100 nf gnd2 100 nf 5 v gnd1 HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 100 nf v cc1 24 k ? r ref v out scope 100 nf 100 nf 1 f 100 f gnd1 v im = 10 v pp gnd1 1 k ? HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 100 f v cc2 100 nf 2k ? v in =0.5v pp 24 k ? r ref v cc1 100 nf gnd2 gnd2 pulse gen. gnd1 100 nf gnd1 100 nf 1f v out v pulse =5v, f pulse 1khz
14 te s t c i r c u i t d i a g r a m s ( c o n t . ) unless otherwise noted, all test circuits are at t a = 25 c, v cc1 = 5 v, v cc2 = 5 v, sinusoidal wave form input, and signal frequency f = 132 khz. figure 22. tx-pd-out harmonic distortion test circuit. figure 23. line driver harmon ic distortion test circuit. figure 24. line driver bandwidth test circuit. 100 nf 1 f spectrum 100 nf v cc2 HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 v cc1 24 k ? r ref 1 f gnd1 100 f 100 nf gnd2 50 ? gnd2 2 k ? v in = 0.5 v pp a nalyzer 100 nf v cc1 1 k ? gnd2 gnd2 100 f spectrum a nalyzer v in 24 k ? r ref gnd1 2 k ? HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 100 nf 100 nf 100 nf v cc2 50 ? v cc1 v cc1 gnd2 100 nf 1 f 100 nf gnd1 1 f v out = 3.6 v pp v in = 1 v pp f = 10 k ~ 10 mhz 100 nf 100 f gnd1 50 ? r l 24 k ? r ref v out 100 nf gnd2 gnd2 100 nf 1 f 1 f HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 100 nf 2 k ? v cc1 v cc2 v cc1 100 nf gnd1 gnd2
15 applications information typical application for fsk modulation scheme the hcpl- 800j is designed to work with various transceivers and can be used with a variety of modulation methods including ask, fsk and bpsk. figure 25 shows a typical application in a powerline modem using frequency shift keying (fsk) modulation scheme. transmitter the analogue tx input pin is connected to the modulator via an external coupling capacitor c1 and a series resistor r3 (see figure 25). optimal performance is obtained with an input signal of 250 a pp . e.g., for a modulator with an output signal of 0.5 v pp using a coupling capacitor of 100 nf, the optimal series resistor r3 would be 2 k ? . tx agc to ensure a stable and constant output voltage at tx- pd- out, the hcpl- 800j includes an automatic gain control (agc) circuit in the isolated transmit signal path. this agc circuit compensates for variations in the input signal level presented at tx- in and figure 25. schematic of HCPL-800J a pplication for fsk modulation scheme. 100 nf filter 100 f v cc2 gnd2 r ref 24 k ? c2 x2 gnd2 n c1 100 nf gnd2 status d1 r4 2 ? 100 nf v cc1 100 nf gnd2 1 f r1 5 k ? gnd2 rx-out gnd1 filter 1 f gnd1 tx-en tx-in l2 r3 2 k ? r2 10 k ? l l1 330 h gnd2 HCPL-800J 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 tx-en tx-in rx-pd-out rx-amp-in status rx-out v cc1 gnd1 r ref rx-in c ext tx-ld-in tx-pd-out v cc2 tx-out gnd2 variations in the optical channel over temperature and time. the tx- pd- out output signal is effectively stabilized for input tx- in signals of between 150 a pp and 250 a pp (see figure 8). the agc circuit starts to function 10 s after the tx- en signal is set to logic high. after a period of 180 s the tx- pd- out signal typically reaches 66% of its steady state level (see figure 26). to ensure correct operation of the internal circuitry, an external 1 f capacitor needs to be connected from pin 11 to gnd2. the optical signal coupling technology used in the hcpl- 800j transmit path achieves very good harmonic distortion typically hd2 < - 50 db and hd3 < - 62 db, which is usually significantly better than the distortion performance of the modulated input signal. however to meet the requirements of some international emc regulations it is often necessary to filter the modulated input signal. the optimal position for such a filter is between pins 13 and 12 as shown in figure 25. a possible band- pass filter topology is shown in figure 27, some typical values of the components in this filter are listed in table 1. figure 26. tx-pd-out agc response time. 50 s/div tx-en 5 v/div tx-pd-out 1 v/div t s , tx t agc
16 to compensate for the attenuation in the filter, the line driver stage has 6 db gain. to prevent the line driver output from saturating, it is therefore important to achieve 6 db of attenuation between tx- pd- out (pin 13) and tx- ld- in (pin 12) either by the inherent filter attenuation or by other means. transmitter line driver the line driver is capable of driving powerline load impedances with output signals up to 4 v pp . the internal biasing of the line driver is controlled externally via a resistor r ref connected from pin 9 to gnd2. the optimum biasing point value for modulation frequencies up to 150 khz is 24 k ? . for higher frequency operation with certain modulation schemes, it may be necessary to reduce the resistor value to enable compliance with international regulations. the output of the line driver is coupled onto the powerline using a simple lc coupling circuit as shown in figure 28. refer to table 1 for some typical component values. capacitor c2 and inductor l1 attenuate the 50/60 hz powerline transmission frequency. a suitable value for l1 can range in value from 200 h to 1 mh. to reduce the series coupling impedance at the modulation frequency, l2 is included to compensate the reactive impedance of c2. this inductor should be a low resistive type capable of meeting the peak current requirements. to meet many regulatory requirements, capacitor c2 needs to be an x2 type. since these types of capacitors typically have a very wide tolerance range of 20%, it is recommended to use as low q factor as possible for the l2/c2 combination. using a high q coupling circuit will result in a wide tolerance on the overall coupling impedance, causing potential communication difficulties with low powerline impedances. occasionally with other circuit configurations, a high q coupling arrangement is recommend, e.g., c2 less than 100 nf. in this case it is normally used as a compromise to filter out of band harmonics originating from the line driver. this is not required with the hcpl- 800j. figure 27. an example of a band-pass filter for transmit. figure 28. lc coupling network. l3 filter input gnd2 filter output r5 c3 gnd2 tx x2 c2 n l2 l1 l 1f rx table 1. typical component values for ba nd-pass filter and lc coupling network. carrier frequency (khz) band-pass filter lc coupling l3 ( h) c3 (nf) l2 ( h) c2 (nf) 110 680 3.3 15 150 120 680 2.7 10 220 132 680 2.2 6.8 220 150 680 1.8 6.8 220 although the series coupling impedance is minimized to reduce insertion loss, it has to be sufficiently large to limit the peak current to the desired level in the worst expected powerline load condition. the peak output current is effectively limited by the total series coupling resistance, which is made up of the series resistance of l2, the series resistance of the fuse and any other resistive element connected in the coupling network. to reduce power dissipation when not operating in transmit mode the line driver stage is shut down to a low power high impedance state by pulling the tx- en input (pin 1) to logic low state. the high impedance condition helps minimize attenuation on received signals.
17 receiver the received signal from the powerline is often heavily attenuated and also includes high level out of band noise. receiver performance can be improved by positioning a suitable filter prior to the rx- in input (pin 10). to counter the inevitable attenuation on the powerline, the hcpl- 800j receiver circuit includes a fixed 20 db front- end gain stage. if desired, this fixed gain can be reduced to unity gain by inserting an impedance of 33 k ? in the receiver signal path. it is however recommended to maintain the fixed gain of 20 db at this position and reduce the overall signal gain elsewhere if required. this configuration will result in the best snr and imrr. the optical isolated rx signal appears at rx- pd- out (pin 3). this signal is subsequently ac coupled to the final gain stage via a capacitor. the final gain stage consists of an op- amp configured in an inverting configuration and dc biased at 2.27 v. the actual gain of this gain stage is user programmable with external resistors r1 and r2 as shown in figure 25. the signal output at rx- out (pin 6) is buffered and may be directly connected to the demodulator or adc, using ac coupling if required. internal protection and sensing the hcpl- 800j includes several sensing and protection functions to ensure robust operation under wide ranging environmental conditions. the first feature is the v cc2 under voltage detection (uvd). in the event of v cc2 dropping to a voltage less than 4 v, the output status pin is switched to a logic low state. the next feature is the over- temperature shutdown. this particular feature protects the line driver stage from over- temperature stress. should the ic junction temperature reach a level above 130 c, the line driver circuit is shut down, simultaneously the output of status (pin 5) is pulled to the logic low state. the final feature is load detection function. the powerline impedance is quite unpredictable and varies not just at different connection points but is also time variant. the hcpl- 800j includes a current sense feature, which may be utilized to feedback information on the instantaneous powerline load condition. should the peak current reach a level greater than 0.6 a pp , the output of status pin is pulled to a logic low state for the entire period the peak current exceeds - 0.3 a, as shown in figure 29. using the period of the pulse together with the known coupling impedance, the actual powerline load can be calculated. table 2 shows the logic output of the status pin. external transient voltage protection to protect the hcpl- 800j from high voltage transients caused by power surges and disconnecting/connecting the modem, it is necessary to add an external 6.8 v bi- directional transient voltage protector (as component d1 shown in figure 25). additional protection from powerline voltage surges can be achieved by adding an appropriate metal oxide varistor (mov) across the powerline terminals after the fuse. figure 29. transmit output load detection. 2 s/div status (pin 5) 2v/div tx-out (pin 15) 0.5 a/div t th i th t th table 2. status pin logic output. normal v cc2 < 4 v over-temperature i tx- o u t < -0.3 a receiver mode high low - - transmitter mode high low low low (pulsed)
www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. data subject to change. copyright 2003 agilent technologies, inc. december 09, 2003 5989-0402en v cc2 power supply requirements the recommended voltage regulator to supply v cc2 is a low cost 78l05 or equivalent. to minimize harmonic distortion, it is recommended to connect a tantalum decoupling capacitor of at least 10 f together with a 100 nf ceramic capacitor in parallel. the capacitors should be positioned as close as possible to the supply input pin. the supply voltage for the regulator can be supplied from the system level power supply transformer (powerline side winding). alternatively, the supply can be derived directly from the powerline via a simple low cost circuit as shown in figure 30. figure 30. a simple low cost non-isolated power supply. 630 ma 100 nf gnd x2 1.5 f/3.3 f c* - + l 78l05 220 k ? 1000 f 9.1 v 1 w * 1.5f x2 for 230v mains, 3.3f x2 for 110v mains gnd2 v out v in 5 v varistor n 470 h 120 ma thermal considerations the high efficiency line driver used in the hcpl- 800j ensures minimum internal power dissipation, even for high peak output currents. despite this, operating the line driver continuously with high output currents at elevated ambient temperatures can cause the peak junction temperature to exceed 125 c and/or resulting in the triggering of the thermal protection. to prevent this from happening, when operating the line driver continuously with high output currents, an ambient temperature derating factor needs to be applied. a typical derating curve is shown in figure 31. in this case the assumption is that the transmitter is operating continuously in still air with a typical 2- layer printed- circuit board (pcb). however, it should be noted that operating the transmitter discontinuously for short periods of time will allow lower derating or even no derating at all. conversely operating the line driver continuously with a poor pcb layout and/or with restricted air convection could result in the requirement for a larger derating factor. figure 31. power derating vs. temperature. -40 -15 10 35 60 85 t a ? ambient temperature ? c 0 0.4 0.8 1 1.2 1.4 maximum power dissapation ? w 0.6 0.2 -40 -15 10 35 60 85 t a ? ambient temperature ? c 0 0.4 0.8 1 1.2 1.4 maximum power dissapation ? w 0.6 0.2

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